|
Post by Johnkenn on Jan 10, 2024 15:00:24 GMT -6
I’d venture to say I could pick which clock it was using after hearing both. They sound different.
|
|
|
Post by thehightenor on Jan 10, 2024 15:03:46 GMT -6
Wish you were here to hear it...not saying there's no way it couldn't be psychosomatic, but they sound different. Not sure why, but they do. +1 My system definitely sounds better running it off the HEDD 192 clock - by a surprising margin. Not night and day - but not super subtle either. Thus, I conclude internal clocking doesn’t always sound better.
|
|
Deleted
Deleted Member
Posts: 0
|
Post by Deleted on Jan 10, 2024 15:44:09 GMT -6
Thus, I conclude internal clocking doesn’t always sound better. Theoritically an internal phase locked loop system (PLL, which usually contains a phase comparator, loop filter & VCO) within a correctly setup clock generation tree(s) should always be "better", although that depends on multiple factors like the design or components used. If certain conditions can be met like a compatible external clock with 256 times the frequency rate generated by an external oscillator / frequency divider then you're probably fine, however if that's not the case then PLL's are used to generate clocks for DAC's or serial interfaces etc.
You can increase the THD by messing around with sample rate registers & PLL parameters on some boards and my point is there's plenty of ways to screw up a clocking scheme. I'll not go too deep however but in short if something sounds better with an external clock (as in stronger stereo image etc.) then something's gone up the wall in a technical sense. I understand the methodology of inducing distortion (like Burl) to shape the sound to an extent but on a clean modern PLL converter? That does make me scratch my head. Although sometimes they do and from the geeky side of me I always get very curious as to why..
|
|
|
Post by thehightenor on Jan 10, 2024 15:57:49 GMT -6
Thus, I conclude internal clocking doesn’t always sound better. Theoritically an internal phase locked loop system (PLL, which usually contains a phase comparator, loop filter & VCO) within a correctly setup clock generation tree(s) should always be "better", although that depends on multiple factors like the design or components used. If certain conditions can be met like a compatible external clock with 256 times the frequency rate generated by an external oscillator / frequency divider then you're probably fine, however if that's not the case then PLL's are used to generate clocks for DAC's or serial interfaces etc.
You can increase the THD by messing around with sample rate registers & PLL parameters on some boards and my point is there's plenty of ways to screw up a clocking scheme. I'll not go too deep however but in short if something sounds better with an external clock (as in stronger stereo image etc.) then something's gone up the wall in a technical sense. I understand the methodology of inducing distortion (like Burl) to shape the sound to an extent but on a clean modern PLL converter? That does make me scratch my head. Although sometimes they do and from the geeky side of me I always get very curious as to why..
I didn’t understand a word of that post! But I appreciate the attempt at educating me All I have are my ears. As a professional musician of 42 years standing - I’ve learnt to trust what I hear.
|
|
Deleted
Deleted Member
Posts: 0
|
Post by Deleted on Jan 10, 2024 16:10:05 GMT -6
I didn’t understand a word of that post! But I appreciate the attempt at educating me All I have are my ears. , techie stuff aside using an external clock in theory at least should never really improve the sound of a device. If it does then something funky is going on somewhere..
|
|
|
Post by Johnkenn on Jan 10, 2024 18:57:26 GMT -6
I didn’t understand a word of that post! But I appreciate the attempt at educating me All I have are my ears. , techie stuff aside using an external clock in theory at least should never really improve the sound of a device. If it does then something funky is going on somewhere.. Man...IDK. That might be what it says on paper...but people are hearing improvements...or at least what they consider improvements. Really wish there was a way to have people hear what I'm hearing. Regardless of which clock sounds "better" they at the very least sound different.
|
|
|
Post by notneeson on Jan 10, 2024 19:00:06 GMT -6
, techie stuff aside using an external clock in theory at least should never really improve the sound of a device. If it does then something funky is going on somewhere.. Man...IDK. That might be what it says on paper...but people are hearing improvements...or at least what they consider improvements. Really wish there was a way to have people hear what I'm hearing. Regardless of which clock sounds "better" they at the very least sound different. If it sounds good it is good.
|
|
|
Post by wiz on Jan 11, 2024 1:28:35 GMT -6
Run two mixes off, one clocked internal.. one external....post em up...let's hear em...
cheers
Wiz
|
|
|
Post by kcatthedog on Jan 11, 2024 4:44:11 GMT -6
Without a proper blind test, you can’t control for subjective bias.
I thought the simple answer is internal clock is best ?
|
|
timix
Full Member
Posts: 33
|
Post by timix on Jan 11, 2024 8:07:22 GMT -6
When we bought our Prism ADA8 XR years ago, the distributor said Prism said not to daisy chain but to use a Video Distribution Amplifier to distribute the 75 ohm WC, that doesn't do any processing such as gain etc, using the Prism as the master, He also said that the coax should all be the same length. We did all of this and everything sounded incredible. Internal clock sounds best in mastering grade converters like Prism, Lavry, Antelope, Crane Song, lesser converters will benefit from a good external clock, Grimm has the best reputation, Antelope are good too. Last year i went to friends studio which had a Yamaha DM2000 console, he played me some live reordings he'd done using that console in its previous home , a live music venue. The mixes were good but sounded very digital and ill defined I hooked up my Antelope Pure2 WC to the DM2000 WC in, still listening to the main outs of the DM2000. The improvement in sound was shocking to me, I never thought it could sound that good, al lot warmer, punchier and detailed. We also listened thru the Pure2 and of course it sounded better again. Years ago I was involved in master clock test at a high end digital facility, at the time Big Ben was popular, we had a Lucid and brought in an Antelope OCX and BB in to try. Initially we couldnt hear much difference with a diverse variety of music, one track we listened to had a very deep kick sound, on the BB it sounded ill defined and flabby, with the OCX it was tight and punchy but we could also hear for the first time a second tighter less deep kick drum under the main kick drum sound. The Lucid was close to the OCX in sound. After we heard this obvious difference we concluded the test
|
|
|
Post by svart on Jan 11, 2024 9:09:50 GMT -6
Thus, I conclude internal clocking doesn’t always sound better. Theoritically an internal phase locked loop system (PLL, which usually contains a phase comparator, loop filter & VCO) within a correctly setup clock generation tree(s) should always be "better", although that depends on multiple factors like the design or components used. If certain conditions can be met like a compatible external clock with 256 times the frequency rate generated by an external oscillator / frequency divider then you're probably fine, however if that's not the case then PLL's are used to generate clocks for DAC's or serial interfaces etc.
You can increase the THD by messing around with sample rate registers & PLL parameters on some boards and my point is there's plenty of ways to screw up a clocking scheme. I'll not go too deep however but in short if something sounds better with an external clock (as in stronger stereo image etc.) then something's gone up the wall in a technical sense. I understand the methodology of inducing distortion (like Burl) to shape the sound to an extent but on a clean modern PLL converter? That does make me scratch my head. Although sometimes they do and from the geeky side of me I always get very curious as to why..
I'm quite the expert (I know, kinda conceited, right?) in PLLs. I've done some pretty neat stuff with them over the years. First, the phase noise (like jitter, but instead quantified by power density over a frequency offset from the incident signal) is mostly dominated by the reference clock into the PLL. IF a WC signals was used directly for PLL clocking, the phase comparison could only every be as good as whatever the jitter/phase noise of the incoming WC signal. The reference clock generally feeds a divider or multiplier block to get the fundamental into a range the phase comparator can handle, then it's fed into the phase comparator. At the same time, the oscillator (VCO or voltage controlled oscillator) output is fed back into a divider network with the resulting frequency being either identical or fractionally divided to match the reference frequency, then fed into the phase comparator as well. The phase of the two signals is compared and any offset is output as current pulses through a low-pass filtering network (loop filter) which takes current pulses and turns them into a steady DC voltage that feeds the VCO, hence the Voltage Control. This filter is critical because the filter directly affects the rest of the phase noise/jitter of the signal. If the filter is too aggresive, then you lose the ability to adjust the DC quickly enough and your PLL output will wander around slowly in frequency. If it's too light, then the filter allows a lot of higher frequency jitter and spurious noise through. It can't be understated how critical the balance is between some of these parts values and performance can be. Some PLLs have frequency dividers on their outputs. This is useful because frequency division also divides jitter. Using a PLL with a higher internal working frequency (higher phase comparator frequency) but dividing the output signal down as much as possible is the ideal scenario for any frequency generation. I'd say that the minimum case for using WC would be to use a "jitter cleaner" IC on the incoming WC clock. Jitter cleaners are usually a specific form of PLL device that is meant to loosely lock the PLL to the noisy reference signal and then produce an output signal of the same fundamental frequency, but without the jitter. There's a dozen different ways they do this, but mostly it seems that they are a dual PLL, with the dirty reference being aggressively filtered, upconverted through the first PLL, then that output is divided down and used for the reference of a second PLL which is upconverted, then divided down once again to output the "clean" clock. They really don't "clean" anything, just reproduce an output with the same phase angle and frequency as the input signal. That clock would be then fed through a switch to the main clock PLL for the interface. The switch would choose either the internal reference, or the "external" cleaned reference. It's still possible that the external WC is actually used directly in cheaper systems, but this would be a worst-case for phase noise/jitter. Anyway, I was successful in getting a fast settling (~50uS) integrated PLL to have around 200fS of jitter. I think I made about 15 variations of loop filter to find the optimal filter topology and values. I was also successful in designing a circuit that tapped into the loop filter and modulated BPSK data onto the filter to obtain a frequency agile communication system in the 5M-2G band.
|
|
Deleted
Deleted Member
Posts: 0
|
Post by Deleted on Jan 11, 2024 9:20:55 GMT -6
, techie stuff aside using an external clock in theory at least should never really improve the sound of a device. If it does then something funky is going on somewhere.. Man...IDK. That might be what it says on paper...but people are hearing improvements... or at least what they consider improvements. Really wish there was a way to have people hear what I'm hearing. Regardless of which clock sounds "better" they at the very least sound different. Well that's the crutch really, without some form of technical analysis we'll never really know. I mean most converters seem to copy the same premise nowadays, delta sigma, oversampling, PLL etc. with a PLL it's going to regenerate the clock anyway and if they've made any mistakes here it really won't matter what it's being clocked to. Also you could be degrading the signal but for some reason prefer it. It's like why doesn't everyone just use a TLM170? Or a modern flat, low noise, high performance mic on everything?
These poor souls trying to do everything possible to remove THD whilst I'm doing everything I can to add it back in via a controlled manner. Also we do sort of trust that manufacturers always get it right although I've had plenty of faulty products with technical design flaws over the years. One of the reasons I didn't go for the higher end Intel MBP 2018(ish) was because they kept constantly overheating and throttling. That's Apple, not some small to mid sized converter manufacturer.
I mean there's plenty of potential reasons, I'm certainly not doubting you. All I'm saying is, it shouldn't happen even though there's no real reason why it couldn't.
|
|
Deleted
Deleted Member
Posts: 0
|
Post by Deleted on Jan 11, 2024 9:25:50 GMT -6
I'm quite the expert (I know, kinda conceited, right?) in PLLs. I've done some pretty neat stuff with them over the years. Anyway, I was successful in getting a fast settling (~50uS) integrated PLL to have around 200fS of jitter. I think I made about 15 variations of loop filter to find the optimal filter topology and values. I was also successful in designing a circuit that tapped into the loop filter and modulated BPSK data onto the filter to obtain a frequency agile communication system in the 5M-2G band. Lol, I like it.. Always up for learning and TBH it has been a while since I've done anything with conversion, I moved industries quite a while back. Although from what I remember that is impressive Chris.
|
|
|
Post by Johnkenn on Jan 11, 2024 11:22:35 GMT -6
Without a proper blind test, you can’t control for subjective bias. I thought the simple answer is internal clock is best ? People get so dogmatic about this stuff. There’s plenty of scientific dogmas that were absolutely, positively true before they were proven wrong. It’s just hard for me to believe one thing while hearing it being disproven right in front of me. 🤷
|
|
|
Post by kcatthedog on Jan 11, 2024 11:57:55 GMT -6
I’m not poking you with a stick, and think you should go with what you prefer: trust your gut.
I was more commenting on the very large body of opinion that internal clocking is best and yet, some people have different experiences.
|
|
|
Post by Martin John Butler on Jan 11, 2024 12:57:14 GMT -6
Whatever Black Lion Audio did in the mod for my Apollo6 it worked. Center image is clearer, soundstage is wider now. I think the Burl and the Symphony are all about the color they add, not the accuracy.
I really liked the Burl when I had it for a week, and prefer the Symphony when I’ve heard it compared to the Apollo. With the BLA mod, my Apollo sounds like the Dangerous Music conversion to me now.
That’s good enough unless I hit the lottery.
|
|
|
Post by seawell on Jan 11, 2024 12:59:53 GMT -6
Above all, trust your ears 👍🏼
|
|
|
Post by thehightenor on Jan 11, 2024 13:01:16 GMT -6
Theoritically an internal phase locked loop system (PLL, which usually contains a phase comparator, loop filter & VCO) within a correctly setup clock generation tree(s) should always be "better", although that depends on multiple factors like the design or components used. If certain conditions can be met like a compatible external clock with 256 times the frequency rate generated by an external oscillator / frequency divider then you're probably fine, however if that's not the case then PLL's are used to generate clocks for DAC's or serial interfaces etc.
You can increase the THD by messing around with sample rate registers & PLL parameters on some boards and my point is there's plenty of ways to screw up a clocking scheme. I'll not go too deep however but in short if something sounds better with an external clock (as in stronger stereo image etc.) then something's gone up the wall in a technical sense. I understand the methodology of inducing distortion (like Burl) to shape the sound to an extent but on a clean modern PLL converter? That does make me scratch my head. Although sometimes they do and from the geeky side of me I always get very curious as to why..
I'm quite the expert (I know, kinda conceited, right?) in PLLs. I've done some pretty neat stuff with them over the years. First, the phase noise (like jitter, but instead quantified by power density over a frequency offset from the incident signal) is mostly dominated by the reference clock into the PLL. IF a WC signals was used directly for PLL clocking, the phase comparison could only every be as good as whatever the jitter/phase noise of the incoming WC signal. The reference clock generally feeds a divider or multiplier block to get the fundamental into a range the phase comparator can handle, then it's fed into the phase comparator. At the same time, the oscillator (VCO or voltage controlled oscillator) output is fed back into a divider network with the resulting frequency being either identical or fractionally divided to match the reference frequency, then fed into the phase comparator as well. The phase of the two signals is compared and any offset is output as current pulses through a low-pass filtering network (loop filter) which takes current pulses and turns them into a steady DC voltage that feeds the VCO, hence the Voltage Control. This filter is critical because the filter directly affects the rest of the phase noise/jitter of the signal. If the filter is too aggresive, then you lose the ability to adjust the DC quickly enough and your PLL output will wander around slowly in frequency. If it's too light, then the filter allows a lot of higher frequency jitter and spurious noise through. It can't be understated how critical the balance is between some of these parts values and performance can be. Some PLLs have frequency dividers on their outputs. This is useful because frequency division also divides jitter. Using a PLL with a higher internal working frequency (higher phase comparator frequency) but dividing the output signal down as much as possible is the ideal scenario for any frequency generation. I'd say that the minimum case for using WC would be to use a "jitter cleaner" IC on the incoming WC clock. Jitter cleaners are usually a specific form of PLL device that is meant to loosely lock the PLL to the noisy reference signal and then produce an output signal of the same fundamental frequency, but without the jitter. There's a dozen different ways they do this, but mostly it seems that they are a dual PLL, with the dirty reference being aggressively filtered, upconverted through the first PLL, then that output is divided down and used for the reference of a second PLL which is upconverted, then divided down once again to output the "clean" clock. They really don't "clean" anything, just reproduce an output with the same phase angle and frequency as the input signal. That clock would be then fed through a switch to the main clock PLL for the interface. The switch would choose either the internal reference, or the "external" cleaned reference. It's still possible that the external WC is actually used directly in cheaper systems, but this would be a worst-case for phase noise/jitter. Anyway, I was successful in getting a fast settling (~50uS) integrated PLL to have around 200fS of jitter. I think I made about 15 variations of loop filter to find the optimal filter topology and values. I was also successful in designing a circuit that tapped into the loop filter and modulated BPSK data onto the filter to obtain a frequency agile communication system in the 5M-2G band. That is proper rocket science! But still, my ears tell me something else. And yes I’ve done a double blind test. My systems sounds “preferable” to my ears clocked from my HEDD 192. There we have it. As they say, theory can only get you so far
|
|
|
Post by Johnkenn on Jan 11, 2024 13:09:49 GMT -6
And hey - maybe it's that I don't recognize proper clocking. There have certainly been many other "all that glitters isn't gold" instances that I feel like I wouldn't have recognized 10 years ago. Like - the Warm 67. Sounds great on first listen...but start digging the bottom out in a mix and you then hear the problem mids and top you're left with. Sometimes when things are out of phase, they can sound bigger and wider...and I'm sure people could name a bunch more.
So I'm not saying anyone is wrong...I'm just saying that at my knowledge/skill/experience level (which I would say is relatively high) I don't recognize the internal clocking in this situation as sounding "better." It could totally be a taste preference too...it's not like they're both incredibly different.
All that being said, I'm about to switch around a couple times and see if it still sounds different.
|
|
|
Post by svart on Jan 11, 2024 13:27:45 GMT -6
I'm quite the expert (I know, kinda conceited, right?) in PLLs. I've done some pretty neat stuff with them over the years. First, the phase noise (like jitter, but instead quantified by power density over a frequency offset from the incident signal) is mostly dominated by the reference clock into the PLL. IF a WC signals was used directly for PLL clocking, the phase comparison could only every be as good as whatever the jitter/phase noise of the incoming WC signal. The reference clock generally feeds a divider or multiplier block to get the fundamental into a range the phase comparator can handle, then it's fed into the phase comparator. At the same time, the oscillator (VCO or voltage controlled oscillator) output is fed back into a divider network with the resulting frequency being either identical or fractionally divided to match the reference frequency, then fed into the phase comparator as well. The phase of the two signals is compared and any offset is output as current pulses through a low-pass filtering network (loop filter) which takes current pulses and turns them into a steady DC voltage that feeds the VCO, hence the Voltage Control. This filter is critical because the filter directly affects the rest of the phase noise/jitter of the signal. If the filter is too aggresive, then you lose the ability to adjust the DC quickly enough and your PLL output will wander around slowly in frequency. If it's too light, then the filter allows a lot of higher frequency jitter and spurious noise through. It can't be understated how critical the balance is between some of these parts values and performance can be. Some PLLs have frequency dividers on their outputs. This is useful because frequency division also divides jitter. Using a PLL with a higher internal working frequency (higher phase comparator frequency) but dividing the output signal down as much as possible is the ideal scenario for any frequency generation. I'd say that the minimum case for using WC would be to use a "jitter cleaner" IC on the incoming WC clock. Jitter cleaners are usually a specific form of PLL device that is meant to loosely lock the PLL to the noisy reference signal and then produce an output signal of the same fundamental frequency, but without the jitter. There's a dozen different ways they do this, but mostly it seems that they are a dual PLL, with the dirty reference being aggressively filtered, upconverted through the first PLL, then that output is divided down and used for the reference of a second PLL which is upconverted, then divided down once again to output the "clean" clock. They really don't "clean" anything, just reproduce an output with the same phase angle and frequency as the input signal. That clock would be then fed through a switch to the main clock PLL for the interface. The switch would choose either the internal reference, or the "external" cleaned reference. It's still possible that the external WC is actually used directly in cheaper systems, but this would be a worst-case for phase noise/jitter. Anyway, I was successful in getting a fast settling (~50uS) integrated PLL to have around 200fS of jitter. I think I made about 15 variations of loop filter to find the optimal filter topology and values. I was also successful in designing a circuit that tapped into the loop filter and modulated BPSK data onto the filter to obtain a frequency agile communication system in the 5M-2G band. That is proper rocket science! But still, my ears tell me something else. And yes I’ve done a double blind test. My systems sounds “preferable” to my ears clocked from my HEDD 192. There we have it. As they say, theory can only get you so far All I can say is that if you can hear a difference, then it should be measurable. We could easily measure the clock quality at the ADC IC between different sources, then track backwards in the systems to see where the differences originate. And I'm also saying that there is a LOT of circuitry between various blocks of the clocking system. The source making a difference might be obvious, but the reason it does make a difference might not. I still can't figure out how stereo fields can be changed by a single clock, but I also don't have enough information about the designs of the circuits to debate with any kind of certainty either. Most stereo converter ICs use a clock input/output called LRCK (left/right clock) to determine which side the data is currently sourced from. If the ADC is in master mode, then the LRCK and the BCK(bit clock) as well as the DATA are all sourced from the ADC from a divided down MCLK (master clock) input. However, if a design needs to have many ADC in parallel, they will likely share the LRCK, BCK and DATA lines in TDM mode, which allows more than one device to timeshare the digital audio bus. In this case, you might have ALL the ADCs running as slaves to some derived master clock, or maybe one ADC as master and the rest as slaves. Either way, PCB trace lengths might cause slight delays between parts which could increase latency between ICs which would create a micro-Haas effect, especially if one input is on an IC and a second input is on another IC. In this case, a higher amount of jitter might cover such an effect up and less jitter would, of course, allow it to be more defined. However, a difference in upstream clock source should be so decoupled from this section of clocking, that I wouldn't expect a whole lot of difference.
|
|
|
Post by kcatthedog on Jan 11, 2024 13:32:27 GMT -6
|
|
|
Post by Johnkenn on Jan 11, 2024 13:40:57 GMT -6
OK - so you ever use a deesser and solo "listen" function where you're just hearing the esses? Or swept a tightly Q'd EQ back and forth around the high frequencies? I would imagine everyone is similar, but it's like my eardrums "collapse" (not literally obviously) at certain higher frequencies. Or it becomes like annoying or "ouch.."
I'm listening to a Lainey Wilson song, "Watermellon Sunshine." With the Apollo clocking, when she lays into notes, I get that "ear collapsing"...it's not obnoxious. But it goes away when I change clocks. The bottom gets bigger, top rolls off a bit. It's not as strident. The Apollo clock miiiight actually make the soundstage a little wider.
|
|
|
Post by ab101 on Jan 11, 2024 14:06:19 GMT -6
I do not think the stereo fields actually get technically wider with a different clock, but they are perceived as wider because a different clock may bring more perceived clarity of elements that exist in the left/right spectrum. Does that make any sense? I would be curious about what svart thinks about this possibility as I am no expert on this.
|
|
|
Post by svart on Jan 11, 2024 14:23:01 GMT -6
OK - so you ever use a deesser and solo "listen" function where you're just hearing the esses? Or swept a tightly Q'd EQ back and forth around the high frequencies? I would imagine everyone is similar, but it's like my eardrums "collapse" (not literally obviously) at certain higher frequencies. Or it becomes like annoying or "ouch.." I'm listening to a Lainey Wilson song, "Watermellon Sunshine." With the Apollo clocking, when she lays into notes, I get that "ear collapsing"...it's not obnoxious. But it goes away when I change clocks. The bottom gets bigger, top rolls off a bit. It's not as strident. The Apollo clock miiiight actually make the soundstage a little wider. Human ears are amazing at picking up small amounts of distortion. I'd think that the "ouch" that you get is some kind of odd order modulation. It certainly could be from a clock, but I'd think that it could be from distortion introduced by unintended frequency spurs, not necessarily "jitter" per se. Jitter is only one metric we could judge a clock by. Heck, even the spurious profile could change over time.
|
|
|
Post by svart on Jan 11, 2024 14:36:37 GMT -6
Makes me wonder about under/overshoot on the wordclock input. You mentioned not having any termination. The whole point of termination is to mitigate reflections on cables. Yes, an electromagnetic signal can reflect just like any optical or audio signal. We typically consider short cables to be immune from reflection, but it really depends on the driver. A strong driver can withstand minor reflective signals without much distortion, but a weaker driver might not be able to withstand the power of a reflected signal without distorting, which would add amounts of harmonic content not intended. Longer cables delay the reflection by increasing amounts until the reflection can be seen separate from the transmitted signal. However, if the cable is short, the reflection can be so fast that the rising/falling edges can be so close to the transmitted signal's rising/falling edges that it would look like severe jitter. Can you describe the coax WC connection once again? Oh and I did a very rough sketch of what might happen which doesn't really take into account the jitter that might be added:
|
|